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MSM66P54
One-Time Programmable (OTP) Speech Synthesizer DESCRIPTION
The MSM66P54 is a one-time-programmable (OTP) version of the MSM6654 speech synthesizer, suitable for evaluation of the MSM6650 family and code development. This part is also suitable for applications requiring small quantities and/or short-term delivery after code completion. The PC-based AR76-202 Speech Development System is used for speech encoding, editing, and programming of the MSM66P54. When compared to the mask-programmed MSM6654 version, the SOP-packaged version of the MSM66P54 is backwards compatible, while the DIP-packaged version has two extra pins for programming. On the DIP version, programming pins can either be cut off or left open after programming. DIP pin spacing and location allows insertion of the MSM66P54 into an IC socket intended for the MSM6654. To provide high-quality speech synthesis, all members of the MSM6650 family members implement adaptive differential pulse-code modulation (ADPCM) playback, pulse-code modulation (PCM) playback, 12-bit D/A conversion, and an on-chip -40dB/octave low-pass filter (LPF). In addition, easy-to-use "beep" tones, a two-channel mixing function, a melody function, a fade-out function, and a random playback function are included. Also, an on-chip edit ROM can form sentences by catenating phrases, making external control simpler than before. Four code versions of the MSM66P54 are available. Stand-alone or microcomputer (MCU) interface modes can be selected by using one of the four available codes. The table below shows the code versions available. MSM66P54 Code Versions
Part No. MSM66P54-01 MSM66P54-02 MSM66P54-03 MSM66P54-04 OTP ROM 1 Mbit 1 Mbit 1 Mbit 1 Mbit Mode MCU Interface Mode MCU Interface Mode Standalone Mode Standalone Mode Interface/Standby Features Serial Interface Parallel Interface Standby Function No Standby Function
FEATURES
* * * * * * * * * Single-chip synthesizer 4-bit ADPCM or 8-bit PCM sound playback Melody function Edit ROM function Built-in two-channel mixing function Internal random playback function Fade-out function Built-in "beep" tones at 0.5, 1.0, 1.6, and 2.0 kHz Sampling frequency of 4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16, or 32 kHz[1] Up to 127 phrases Internal 12-bit D/A converter Internal -40 dB/octave low-pass filter (LPF) Built-in standby function Selectable RC oscillation or ceramic/crystal oscillation * Package options include 20-pin DIP (DIP20-P-300), 24-pin SOP (SOP24-P-430-2K), or die * * * * *
1. 32 kHz is not available when RC oscillation is selected
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The table below shows the additional functions available in the MSM6650 family when compared to the family's predecessor, the MSM637x family. Comparison of MSM6376 and MSM6650 Families
MSM6650 Family Control Method Standalone mode Microcomputer mode - parallel input Microcomputer mode - serial input 4-bit ADPCM or 8-bit PCM/Melody PCM 0.5, 1.0, 1.6, or 2.0 kHz (User-specified length of variable duration) Eight frequencies (4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16.0, or 32.0 kHz) 256 kHz (RC) / 4.096 MHz (crystal) -40 dB/octave
fCUT fSAM 1.8 4.0 2.6 5.3 2.6 6.4 3.2 4.2 5.1 6.4 12.8 fCUT fSAM
MSM637x Family CPU input - software control
Speech synthesis method "Beep" tone frequency (length)
4-bit ADPCM 1.0 or 2.0 kHz, (User-specified length, fixed at either 64, 128, 250, or 500 ms) Three frequencies at two oscillator frequencies (4.0, 6.4, or 8.0 kHz with fOSC = 64 kHz; 16.0, 25.6, or 32.0 kHz with fOSC = 256 kHz) 40 kHz ~ 256 kHz -24 dB/octave
1.5 4.0 3.0 6.4 3.0 8.0
Sampling frequency (fS) Master clock frequency LPF attenuation factor LPF cut-off Frequency (fCUT), kHz Maximum phrase number Pull-up/pull-down resistors Standby conversion time Maximum external ROM
8.0 10.6 12.8 16.0 32.0
127 (in MCU Interface Mode) Built in 200 ms 64 Mbit Fade-out Random playback Melody playback PCM playback Serial input control
111 -- 3 Sec 16 Mbit
Added functions in edit ROM
No Edit ROM
SPEECH DURATION
Maximum Speech Duration fSAM = 4.0 kHz > 1 hour 16.9 sec 31.2 sec 63.8 sec 63.8 sec 96.5 sec 129.1 sec fSAM = 6.4 kHz > 40 minutes 10.5 sec 19.5 sec 39.9 sec 39.9 sec 60.3 sec 80.7 sec fSAM = 8.0 kHz > 30 minutes 8.4 sec 15.6 sec 31.9 sec 31.9 sec 48.2 sec 64.5 sec fSAM = 16.0 kHz > 15 minutes 4.2 sec 7.8 sec 15.9 sec 15.9 sec 24.1 sec 32.2 sec fSAM = 32.0 kHz > 8 minutes 2.1 sec 3.9 sec 7.9 sec 7.9 sec 12.0 sec 16.1 sec
Type MSM6650 MSM6652 MSM6653 MSM6654 MSM66P54 MSM6655 MSM6656
[3]
Data ROM Capacity [1] 64 Mbits [2] 288 Kbit 544 Kbit 1 Mbit 1 Mbit 1.5 Mbit 2 Mbit
[1] Actual ROM area in MSM6652, MSM6653, MSM6654, MSM6655, and MSM6656 is smaller by 22 Kbits. [2] Via external ROM only (no on-chip ROM available). [3] OTP version.
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------------------------------------------------------------------------ s Package Drawings s
PACKAGE DRAWINGS
22.6 0.2
18 10
6.4 0.2
1
9
4.57 MAX. 5.08 MAX.
7.62 0.25 +0.11/-0.05
3.3 0.3
SEATING PLANE
0.6 TYP. 2.54 1.524 Dimensions in mm. 0.46 +0.13/-0.08 o0.25
M
0~15
1.14 TYP.
Figure 1. MSM66P54 Mechanical Drawing (DIP20-P-300-W1 Package)
15.95 0.1
24 13
0.2 +0.1/-0.05
12.0 0.5 7.9 0.1
Index Mark
1
12
0.99 TYP.
1.27
0.35 0.1
0.25
M
7.9 0.1
2.7 MAX. 2.2 0.2
2.05 0.3
0~10
Seating Plane Dimensions in mm.
0 ~ 0.3
1.2 0.2
Figure 2. MSM66P54 Mechanical Drawing (SOP24-P-430-2K Package)
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BLOCK DIAGRAMS
VPP
PGM
Programming Circuitry
A2 A1 A0 SW3 SW2 SW1 SW0 TEST RND
Address & Switching Controller
7
17-Stage Multiplexer
1-Mbit OTP ROM (Containing 22-Kbit Edit ROM & Address ROM) 8
Random Circuit
DATA Controller
ADPCM Synthesizer
17-Stage Address Counter I/O Interface PCM Synthesizer 12 Melody Generator OSC (X'tal/RC) Timing Controller BEEP Tone Generator 12-bit DAC
BUSY
OSC1 OSC2 OSC3
LPF
XT/RC
RESET
VDD
GND
AOUT
Figure 3. MSM66P54-03/-04 Block Diagram (Standalone Mode)
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-------------------------------------------------------------------------- s Block Diagrams s
VPP
PGM
Programming Circuitry
I6/SD I5/SI 14 I3/PORT1 I4/PORT0 I1 I0
Address & Command Controller
7
17-Stage Multiplexer
1-Mbit OTP ROM (Containing 22-Kbit Edit ROM & Address ROM) 8
DATA Controller CH ST CMD BUSY NAR 17-Stage Address Counter I/O Interface
ADPCM Synthesizer
PCM Synthesizer 12 Melody Generator 12-bit DAC
XT XT
OSC X'tal
Timing Controller BEEP Tone Generator
LPF
RESET
VDD
GND
AOUT
Figure 4. MSM66P54-01/-02 Block Diagram (MCU Interface Mode)
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PIN CONFIGURATION
VPP A0 A1 A2 TEST RESET BUSY XT/RC AOUT GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
PGM SW3 SW2 SW1 SW0 RND OSC3 OSC2 OSC1 VDD
VDD OSC1 OSC2 NC OSC3 NC PGM RND SW0 SW1 SW2 SW3
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND AOUT XT/RC NC BUSY NC VPP RESET TEST A2 A1 A0
18 Lead Plastic DIP 24 Lead Plastic SOP
Figure 5. MSM66P54-03/-04 Configuration (Standalone Mode)
VPP I4 I5/SI I6/SD CH RESET BUSY NAR AOUT GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
PGM I3/PORT1 I2/PORT0 I1 I0 ST CMD XT XT VDD
VDD XT XT NC CMD NC PGM ST I0 I1 I2/PORT0 13/PORT1
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND AOUT NAR NC BUSY NC VPP RESET CH I6/SD I5/SI I4
20-Lead Plastic DIP 24 Lead Plastic SOP
Figure 6. MSM66P54-01/-02 Pin Configuration (MCU Interface Mode)
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------------------------------------------------------------------------- s Pin Descriptions s
PIN DESCRIPTIONS
MSM66P54-03/-04 Pin Descriptions (Standalone Mode)
Pin Name RESET I/O I Function Reset. Setting this pin to "L" puts the device in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the device is initialized. The MSM6650 Family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. X'tal/RC selectable pin. Set to "H" level when using ceramic/crystal oscillation. Set to "L" level when using RC oscillation. Sound output. This is the synthesized output pin of the internal low-pass filter. Ground. Power supply. Oscillator 1. This pin is a ceramic/crystal oscillator connection pin when using ceramic or crystal oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. Oscillator 2. This pin is a ceramic/crystal oscillator connection pin when using a ceramic or crystal oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. Oscillator 3. Leave open if using a ceramic/crystal oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an internal pull-up resistor. Test Mode. Set to "H" level. This pin has an internal pull-up resistor. Phrase Inputs. These pins are phrase input pins corresponding to playback. If the input changes, SW0 ~ SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. Phrase Inputs. Phrase input pins corresponding to playback. The A0 input becomes invalid when the random playback function is used. Power-supply voltage for programming the on-chip OTP ROM. Set to a "H" level or open during normal operation. Interface pin for AR76-202 Speech Development System. Set to a "L" level or open during normal operation. This pin has an internal pull-down resistor.
BUSY XT/RC AOUT GND VDD OSC1 OSC2
O I O - - I O
OSC3 RND
O I
TEST SW0 ~ SW3 A0 ~ A2 VPP PGM
I I I - I
MSM66P54-01/-02 Pin Descriptions (Microcomputer Interface Mode)
Pin Name RESET I I/O Function Reset. Setting this pin to "L" puts the device in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the device is initialized. The MSM6650 Family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. Next Address Request. The CMD and ST input is valid when NAR is at a "H" level. When the CH pin is at "H" level, NAR becomes a Channel 1 status signal. When the CH pin is at "L", NAR becomes a Channel 2 status signal. This pin indicates whether the register that latches the addresses of I0~I6 in the Address & Command Controller (refer to the block diagram) is empty or not. At "H" level, it is empty and new address data may be applied. At power-on, NAR is "H" level. Analog Sound Output. Either the D/A converter or the low-pass filter output can be selected by a command input. Ground.
BUSY NAR
O O
AOUT GND
O -
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MSM66P54-01/-02 Pin Descriptions (Microcomputer Interface Mode) (Continued)
VDD XT XT CMD - I O I Power supply. Ceramic/Crystal Oscillator Input. A feedback resistor of 0.5~5M between XT and XT is built in this pin. When using an external clock, input to this pin. Ceramic/Crystal Oscillator Output. When using an external clock, leave this pin open. Command Input and Option Selection Control. Command and option input is enabled if the ST pin is set to a "L" level when the CMD pin is "L." Set the CMD pin to a "H" level when CMD is not used and when using the serial input interface. This pin has an internal pull-up resistor. Start. Speech synthesis starts with the fall of ST. With the rise of ST, addresses I0~I6 are latched inside the IC. Input ST when the NAR status signal for Channels 1 and 2 is at a "H" level. A pull-up resistor is built into this pin. Channel control signal. Channel 1 is selected at "H" level and Channel 2 is selected at "L" level. A pull-up resistor is built into this pin. Command Input 6/Serial Data Input. When the parallel input option is selected, this is a command and phrase input pin. When the serial input option is selected, this pin becomes a serial data (command and address) input pin. Command Input 5/Serial Clock Input. When the parallel input option is selected, this is a command and phrase input pin. When the serial input option is selected, this pin becomes a serial clock input pin. Command Input 4. When the parallel input option is selected, this is a command and phrase input pin. When the serial input option is selected, leave this pin at a "L" level. A pull-up resistor is built into this pin. Command Input 3/Port 1 Output. When the parallel input option is selected, this is a command and phrase input pin. When the serial input option is selected, this pin becomes a port output pin. The output from this port can be varied by command inputs from the microcomputer interface. Command Input 2/Port 0 Output. When the parallel input option is selected, this is a command and phrase input pin. When the serial input option is selected, this pin becomes a port output pin. The output from this port can be varied by command inputs from the microcomputer interface. Command Input 1/0. These are command and user specified phrase input pins when parallel input is optionally selected. When the serial input option is selected, leave these pins at a "L" level. A pull-up resistor is built into these inputs. - I Power-supply voltage for programming the on-chip OTP ROM. Set to a "H" level or open during normal operation. Interface pin for AR76-202 Speech Development System. Set to a "L" level or open during normal operation. This pin has an internal pull-down resistor.
ST CH I6/SD I5/SI I4 I3/PORT1
I I I I I I/O
I2/PORT0
I/O
I0, I1
I
VPP PGM
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--------------------------------------------------------------- s Application Circuit Examples s
APPLICATION CIRCUIT EXAMPLES
1
2
3
4 1
5
6
7
8
9 1
10
11
12
13 1
14
15
VDD SW0 SW1 SW2 SW3 AOUT
XT/RC TEST RND A0 A1 A2 GND OSC3 OSC2 OSC1
Figure 7. Application Circuit in Standalone Mode with Serial Input Interface
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VDD S4 S3 S2 S1 SW0 SW1 SW2 SW3 TEST RND XT/RC A0 A1 A2 GND OSC3 OSC2 OSC1 AOUT
Figure 8. Application Circuit in Standalone Mode with Parallel Input Interface The following table shows a comparison between switches and speech playback addresses. Switches and Speech Playback Address Comparison
A2 S1 S2 S3 S4 0 0 0 0 A1 0 0 0 0 A0 0 0 0 0 SW3 0 0 0 1 SW2 0 0 1 0 SW1 0 1 0 0 SW0 1 0 0 0 ADR 01 02 04 08
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--------------------------------------------------------------- s Application Circuit Examples s
P1.0 P1.1 P1.2 P2.0 P3.0 MSM83C154
I6/SD I5/SI ST RESET NAR
VDD I4 I1
MSM6650 Family
PORT1 PORT2
AOUT I4 I1 I0
AMP
XT RESET SA XT GND
Figure 9. Application Circuit in MCU Interface Mode with a Serial Input Interface
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P1.6 ~
I6 ~
VDD
P1.0 P2.0 P3.1 P2.2 P2.1 P3.0
I0 CH CMD ST RESET NAR XT
MSM83C154
MSM6650 Family
RESET SA
XT GND
AOUT
AMP
Figure 10. Application Circuit in MCU Interface Mode with a Parallel Input Interface
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Item Power supply voltage Input voltage Storage temperature Symbol VDD VIN Tstg Conditions Ta = 25 C - Rating -0.3 ~ 7.0 -0.3 ~ VDD+0.3 -55 ~ 150 Unit V V C
Recommended Operating Conditions
Parameter Power supply voltage Operating temperature Original oscillation frequency 1 Original oscillation frequency 2 Symbol VDD TOP fOSC fOSC2 Conditions LPF output DAC Output [1] - When X'tal selected When RC selected
[2]
Rated Value +2.7 ~ +5.5 +2.4 ~ +5.5 -10 ~ 70 3.5 ~ 4.5 200 ~ 300
Unit V C MHz kHz
[1] In Microcomputer Interface Mode only. [2] The accuracy of the oscillation frequency when RC oscillation is selected depends largely on the accuracy of the R and C of the external parts.
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------------------------------------------------------------------ s Electrical Characteristics s
DC Characteristics (VDD = 5.0 V, GND = 0 V, Ta = -10 ~ 70 C)
Item "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current 1 "H" input current 2 "L" input current 1 "L" input current 2 Operating power consumption Standby power consumption LPF driving resistor LPF output impedance Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS RAOUT RLFP Conditions - - IOH = -1 mA IOL = 2 mA VIH = VDD Internal pull-down resistance VIL=GND Internal pull-up resistance - - - IF = 100 A MIN 4.2 - 4.6 - - -200 -10 30 - - 50 - TYP - - - - - -90 - 90 6 - - 1 MAX - 0.8 - 0.4 10 -30 - 200 10 10 - 3 Unit V V V V A A A A mA A k k
DC Characteristics (VDD = 3.1 V, GND = 0 V, Ta = -10 ~ 70 C)
Item "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current 1 "H" input current 2 "L" input current 1 "L" input current 2 Operating power consumption Standby power consumption LPF driving resistor LPF output impedance Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS RAOUT RLPF Conditions - - IOH = -1 mA IOL = 2 mA VIH = VDD Internal pull-down resistance VIL = GND Internal pull-up resistance - - - IF = 100 A MIN 2.7 - 2.6 - - -100 -10 10 - - 50 TYP - - - - - -30 - 30 4 - - 1 MAX - 0.5 - 0.4 10 -10 - 100 7 1 - 3 Unit V V V V A A A A mA A k k
AC Characteristics (Standalone Mode, VDD = 5.0 V, GND = 0 V, Ta = 10 ~ 70 C)
Item Master clock duty cycle RESET input pulse width RESET input time after power-on RND input pulse width SW0 ~ SW3 input pulse width BUSY output time BUSY output time Chattering prevention time Symbol fduty tw(RST) td(RST) tw(RAN) tw(SW) tSBS tBN tCHA Condition - - - Function details 5.2 - - At fSAM = 8 kHz - MIN 40 10 0 100 16 - 350 14 TYP 50 - - - - - 375 15 MAX 60 - - - - 10 400 16 Unit % s s s ms s s ms
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AC Characteristics (Standalone Mode, VDD = 5.0 V, GND = 0 V, Ta = 10 ~ 70 C) (Continued)
Item D/A converter change time LPF stabilization time Standby transition period Random access capture time Symbol tDAR tL tSTB tRA Condition - - - Function details 5.2 MIN 60 6 0.15 16 TYP 64 8 0.20 32 MAX 68 10 0.25 48 Unit ms ms sec s
AC Characteristics (Microcomputer Interface Mode, VDD = 5.0 V, GND = 0 V, Ta = 10 ~ 70 C)
Item Master clock frequency (1) Master clock frequency (2) Master clock duty cycle O(RESET) input pulse width O(RND) input pulse width SW0~SW3 input pulse width (BUSY) output time (BUSY) output time (BUSY) output time Chattering prevention time DA converter change time LPF stabilization time Standby transition period Symbol f(OSC1) f(OSC2) fduty tw(O(RST)) tw(O(RAN)) tw(SW) tSBS tBN tBF tCHA tDAR tL tSTB Condition At XT selection At RC selection [1] - - - - - At fs = 8 kHz - - - - - MIN - - 40 10 100 32 - 350 - 29 60 6 0.15 TYP 4.096 256 50 - - - - 375 - 30 64 8 0.2 MAX - - 60 - - - 10 400 64 31 68 10 0.25 Unit MHz kHz % s s ms s s ms ms ms ms sec
[1] Accuracy of oscillation frequencies when selecting RC oscillation strongly depends on the accuracy of the externally installed capacitor and resistor.
Timing Waveforms
VDD td(RST)
RESET (I)
tw(RST)
BUSY (O)
Figure 11. Power-On Timing
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------------------------------------------------------------------ s Electrical Characteristics s
tw(SW)
SW0 (I) tCHA
Address Data Capture
BUSY(O)
tSBS
IBUSY (O)
STANDBY (O)
A0UT (O)
tL Speech Startup Standby Status Standby Conversion Time
tDAR
tSTB
tDAF Standby Status
Figure 12. Activation of Standby State Timing
SWO (I)
BUSY (O)
tBN
AOUT (I)
Single Phrase Playback
Single-Phrase Repeated Playback
Figure 13. Repeated Playback Timing - Standalone Mode
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A0~A2 (I)
SW0~SW3 (I)
"L"
SW1 (I)
SW0 (I)
BUSY (O)
AOUT (O)
First Phrase Play
tCHA
Second Phrase Play
First Phrase Playback Stops
Figure 14. Playback Timing during Transition of SW0 ~ SW3 - Standalone Mode
RND (I)
BUSY (O)
AOUT (O) Speech Starts Up Random Address Capture
First Phrase Play
Same Phrase Repeated Playback
Figure 15. Repeated Random Playback Timing - Standalone Mode
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------------------------------------------------------------------ s Electrical Characteristics s
CH (I)
"H"
10 ~ 16 (I)
1st Phrase Address
2nd Phrase Address
3rd Phrase Address
CMD (I)
"H"
ST (I)
NAR (O)
tNAB
tNAC
BUSY (O)
tBN
AOUT (O)
tL
tDAR 1st Phrase Play
2nd Phrase Play
3rd Phrase Play
Figure 16. Channel 1 Playback Timing with No External Commands - Microcomputer Interface Mode with Parallel Input
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CH (I)
"H"
10 ~ 16 (I)
Command Data
1st Phrase (Address Data)
2nd Phrase (Address Data)
CMD (I)
ST (I)
NAR (O)
BUSY (O)
AOUT (O)
1st Phrase Play
2nd Phrase Play
Figure 17. Channel 1 Playback Timing when External Commands are Used - Microcomputer Interface Mode with Parallel Input
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------------------------------------------------------------------ s Electrical Characteristics s
CH (I)
"H"
16 ~ I0 (I)
Command Data
1st Phrase (Address Data)
Command Data
2nd Phrase
3rd Phrase
CMD (I)
tCHS ST (I)
tSCH
NAR (O)
BUSY (O)
AOUT (O)
1st Phrase Play
2nd Phrase Play Playback in Channel 2
3rd Phrase Play
Figure 18. Channels 1 and 2 Playback Timing when External Commands are Used - Microcomputer Interface Mode with Parallel Input
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CH (I)
"H"
1st Phrase Address Serial Input 16/SD (I) tSDS 15/SI (I) tSIS CMD (I) "H" tSDS tSSD tw(SCK)
2nd Phrase Address Serial Input
tSIS
ST (I)
BUSY (0)
tNAC
NAR (0)
AOUT (O) Speech Startup
1st Phrase Play
Figure 19. Playback Timing without Using External Command - Microcomputer Interface Mode with Serial Input During serial input, data is transferred to the IC with the rising of the ST input after the input of the serial data.
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------------------------------------------------------------------ s Electrical Characteristics s
CH (I)
"H"
Silence Command Input 16/SD (I)
Command Serial Input
1st Phrase Address Serial Input
15/SI (I)
PORT1 (O)
PORT0 (O)
CMD (I)
"H"
ST (I)
BUSY (O)
NAR (O)
AOUT (O) Speech Playback Code Set
Port Output
Speech Startup
Figure 20. Playback Timing using External Command - Microcomputer Interface Mode with Serial Input
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